#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-cmd.dtsi"
#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-vid.dtsi"
#include "dsi-panel-nt36525-truly-hd-plus-vid.dtsi"
#include "dsi-panel-r66451-hd-plus-90hz-video.dtsi"
#include "dsi-panel-r66451-hd-plus-90hz-cmd.dtsi"
#include <dt-bindings/clock/mdss-14nm-pll-clk.h>

&soc {
	dsi_panel_pwr_supply: dsi_panel_pwr_supply {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <62000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-post-on-sleep = <20>;
		};

		qcom,panel-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "lab";
			qcom,supply-min-voltage = <5600000>;
			qcom,supply-max-voltage = <6000000>;
			qcom,supply-enable-load = <100000>;
			qcom,supply-disable-load = <100>;
		};

		qcom,panel-supply-entry@2 {
			reg = <2>;
			qcom,supply-name = "ibb";
			qcom,supply-min-voltage = <5600000>;
			qcom,supply-max-voltage = <6000000>;
			qcom,supply-enable-load = <100000>;
			qcom,supply-disable-load = <100>;
			qcom,supply-post-on-sleep = <20>;
		};
	};

	dsi_panel_pwr_supply_no_labibb: dsi_panel_pwr_supply_no_labibb {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <62000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-post-on-sleep = <20>;
		};
	};

	dsi_panel_pwr_supply_labibb_amoled: dsi_panel_pwr_supply_labibb_amoled {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <62000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-post-on-sleep = <20>;
		};

		qcom,panel-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "vdda-3p3";
			qcom,supply-min-voltage = <3000000>;
			qcom,supply-max-voltage = <3000000>;
			qcom,supply-enable-load = <13200>;
			qcom,supply-disable-load = <80>;
		};
	};

	sde_dsi: qcom,dsi-display-primary {
		compatible = "qcom,dsi-display";
		label = "primary";
		qcom,dsi-ctrl = <&mdss_dsi0>;
		qcom,dsi-phy = <&mdss_dsi_phy0>;

		clocks = <&mdss_dsi0_pll BYTE0_MUX_CLK>,
			 <&mdss_dsi0_pll PIX0_MUX_CLK>,
			 <&mdss_dsi0_pll BYTE0_SRC_CLK>,
			 <&mdss_dsi0_pll PIX0_SRC_CLK>,
			 <&mdss_dsi0_pll SHADOW_BYTE0_SRC_CLK>,
			 <&mdss_dsi0_pll SHADOW_PIX0_SRC_CLK>;
		clock-names = "mux_byte_clk0", "mux_pixel_clk0",
			"src_byte_clk0", "src_pixel_clk0",
			"shadow_byte_clk0", "shadow_pixel_clk0";
		pinctrl-names = "panel_active", "panel_suspend";
		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		qcom,platform-te-gpio = <&tlmm 81 0>;
		qcom,panel-te-source = <0>;

		vddio-supply = <&L9A>;
		lab-supply = <&lcdb_ldo_vreg>;
		ibb-supply = <&lcdb_ncp_vreg>;
		qcom,mdp = <&mdss_mdp>;

		qcom,dsi-default-panel =
			<&dsi_td4330_truly_v2_video>;
	};

	sde_wb: qcom,wb-display@0 {
		status = "disabled";
		compatible = "qcom,wb-display";
		cell-index = <0>;
		label = "wb_display";
	};

	msm_notifier: qcom,msm_notifier@0 {
		compatible = "qcom,msm-notifier";
		panel = <&dsi_r66451_amoled_hd_90hz_video
			&dsi_r66451_amoled_hd_90hz_cmd>;
	};
};

&mdss_mdp {
	connectors = <&sde_dsi>;
};

&dsi_td4330_truly_v2_cmd {
	qcom,mdss-dsi-t-clk-post = <0x0e>;
	qcom,mdss-dsi-t-clk-pre = <0x36>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
	qcom,esd-check-enabled;
	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
	qcom,mdss-dsi-panel-status-value = <0x1c>;
	qcom,mdss-dsi-panel-on-check-value = <0x1c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;
	qcom,dsi-dyn-clk-enable;
	qcom,dsi-dyn-clk-list =
		<944315056 928576464 932511112 936445760 940380400>;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings =
				[26 20 09 0B 06 02 04 a0
				26 20 09 0B 06 02 04 a0
				26 20 09 0B 06 02 04 a0
				26 20 09 0B 06 02 04 a0
				26 1F 09 0B 06 02 04 a0];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
			qcom,partial-update-enabled = "single_roi";
			qcom,panel-roi-alignment = <40 40 40 40 40 40>;
		};

		timing@1 {
			qcom,mdss-dsi-panel-phy-timings =
				[25 20 09 0A 06 03 04 a0
				25 20 09 0A 06 03 04 a0
				25 20 09 0A 06 03 04 a0
				25 20 09 0A 06 03 04 a0
				25 1F 09 0A 06 03 04 a0];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_td4330_truly_v2_video {
	qcom,mdss-dsi-t-clk-post = <0x0e>;
	qcom,mdss-dsi-t-clk-pre = <0x35>;
	qcom,esd-check-enabled;
	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
	qcom,mdss-dsi-panel-status-value = <0x1c>;
	qcom,mdss-dsi-panel-on-check-value = <0x1c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;
	qcom,dsi-supported-dfps-list = <60 55 48>;
	qcom,mdss-dsi-pan-enable-dynamic-fps;
	qcom,mdss-dsi-pan-fps-update =
		"dfps_immediate_porch_mode_vfp";
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0";
	qcom,dsi-dyn-clk-enable;
	qcom,dsi-dyn-clk-list =
		<976190400 988392784 984325320 980257864>;
	qcom,dsi-dyn-clk-type = "constant-fps-adjust-vfp";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings =
				[25 20 09 0A 06 03 04 a0
				25 20 09 0A 06 03 04 a0
				25 20 09 0A 06 03 04 a0
				25 20 09 0A 06 03 04 a0
				25 1F 09 0A 06 03 04 a0];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};

		timing@1 {
			qcom,mdss-dsi-panel-phy-timings =
				[26 20 09 0B 06 02 04 a0
				26 20 09 0B 06 02 04 a0
				26 20 09 0B 06 02 04 a0
				26 20 09 0B 06 02 04 a0
				26 1F 09 0B 06 02 04 a0];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_nt36525_truly_video {
	qcom,mdss-dsi-t-clk-post = <0x0a>;
	qcom,mdss-dsi-t-clk-pre = <0x21>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings =
				[1F 1B 05 06 03 02 04 a0
				1F 1B 05 06 03 02 04 a0
				1F 1B 05 06 03 02 04 a0
				1F 1B 05 06 03 02 04 a0
				1F 10 04 06 03 02 04 a0];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_r66451_amoled_hd_90hz_video {
	qcom,mdss-dsi-t-clk-post = <0x0c>;
	qcom,mdss-dsi-t-clk-pre = <0x2a>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings =
				[22 1E 07 08 04 02 04 a0
				22 1E 07 08 04 02 04 a0
				22 1E 07 08 04 02 04 a0
				22 1E 07 08 04 02 04 a0
				22 17 06 07 04 02 04 a0];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_r66451_amoled_hd_90hz_cmd {
	qcom,mdss-dsi-t-clk-post = <0x0c>;
	qcom,mdss-dsi-t-clk-pre = <0x2a>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings =
				[22 1E 07 08 04 02 04 a0
				22 1E 07 08 04 02 04 a0
				22 1E 07 08 04 02 04 a0
				22 1E 07 08 04 02 04 a0
				22 17 06 07 04 02 04 a0];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};