#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-cmd.dtsi"
#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-vid.dtsi"
#include "dsi-panel-nt36672e-fhd-plus-90hz-video.dtsi"
#include "dsi-panel-nt36672e-fhd-plus-120hz-video.dtsi"
#include "dsi-panel-sim-video.dtsi"
#include <dt-bindings/clock/mdss-7nm-pll-clk.h>

&soc {
	dsi_panel_pwr_supply_no_labibb: dsi_panel_pwr_supply_no_labibb {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <62000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-post-on-sleep = <20>;
		};
	};

	sde_dsi: qcom,dsi-display-primary {
		compatible = "qcom,dsi-display";
		label = "primary";
		qcom,dsi-ctrl = <&mdss_dsi0>;
		qcom,dsi-phy = <&mdss_dsi_phy0>;

		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
			 <&mdss_dsi0_pll PCLK_MUX_0_CLK>,
			 <&mdss_dsi0_pll BYTECLK_SRC_0_CLK>,
			 <&mdss_dsi0_pll PCLK_SRC_0_CLK>,
			 <&mdss_dsi0_pll SHADOW_BYTECLK_SRC_0_CLK>,
			 <&mdss_dsi0_pll SHADOW_PCLK_SRC_0_CLK>;
		clock-names = "mux_byte_clk0", "mux_pixel_clk0",
			"src_byte_clk0", "src_pixel_clk0",
			"shadow_byte_clk0", "shadow_pixel_clk0";
		pinctrl-names = "panel_active", "panel_suspend";
		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		qcom,platform-te-gpio = <&tlmm 81 0>;
		qcom,panel-te-source = <0>;

		vddio-supply = <&L9A>;
		qcom,mdp = <&mdss_mdp>;

		qcom,dsi-default-panel =
			<&dsi_td4330_truly_v2_video>;
	};

	sde_wb: qcom,wb-display@0 {
		status = "disabled";
		compatible = "qcom,wb-display";
		cell-index = <0>;
		label = "wb_display";
	};

	msm_notifier: qcom,msm_notifier@0 {
		compatible = "qcom,msm-notifier";
		panel = <&dsi_nt36672e_fhd_plus_90hz_video
			&dsi_nt36672e_fhd_plus_120hz_video>;
	};
};

&mdss_mdp {
	connectors = <&sde_dsi>;
};

&dsi_td4330_truly_v2_video {
	qcom,esd-check-enabled;
	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
	qcom,mdss-dsi-panel-status-value = <0x1c>;
	qcom,mdss-dsi-panel-on-check-value = <0x1c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;
	qcom,dsi-supported-dfps-list = <60 55 48>;
	qcom,mdss-dsi-pan-enable-dynamic-fps;
	qcom,mdss-dsi-pan-fps-update =
			"dfps_immediate_porch_mode_vfp";
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0";
	qcom,dsi-dyn-clk-enable;
	qcom,dsi-dyn-clk-list =
		<976190400 988392784 984325320 980257864>;
	qcom,dsi-dyn-clk-type = "constant-fps-adjust-vfp";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 21 08 08 25 22 09
					08 09 02 04 00 1D 18];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};

		timing@1 {
			qcom,mdss-dsi-panel-phy-timings = [00 23 09 09 26 24 09
					09 09 02 04 00 1E 19];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_td4330_truly_v2_cmd {
	qcom,esd-check-enabled;
	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
	qcom,mdss-dsi-panel-status-value = <0x1c>;
	qcom,mdss-dsi-panel-on-check-value = <0x1c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
	qcom,ulps-enabled;
	qcom,dsi-dyn-clk-enable;
	qcom,dsi-dyn-clk-list =
		<944315056 928576464 932511112 936445760 940380400>;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 23 09 09 26 24 09
					09 09 02 04 00 1E 19];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
			qcom,partial-update-enabled = "single_roi";
			qcom,panel-roi-alignment = <40 40 40 40 40 40>;
		};

		timing@1 {
			qcom,mdss-dsi-panel-phy-timings = [00 21 08 08 25 22 09
					08 09 02 04 00 1D 18];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_nt36672e_fhd_plus_90hz_video {
	qcom,esd-check-enabled;
	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
	qcom,mdss-dsi-panel-status-value = <0x9c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 21 20 06
					06 07 02 04 00 16 16];
			qcom,display-topology = <1 1 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_nt36672e_fhd_plus_120hz_video {
	qcom,esd-check-enabled;
	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
	qcom,mdss-dsi-panel-status-value = <0x9c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 08 24 22 08
					08 08 02 04 00 1b 18];
			qcom,display-topology = <1 1 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_sim_vid {
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [01 09 01 01 1B 1B 01
					01 02 02 04 00 0A 11];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};